System-on-a-chip or system on chip (SoC or SOC) refers to integrating all components of a computer or other electronic system into a single integrated circuit (chip). It may contain digital, analog, mixed-signal, and often radio-frequency functions – all on one chip. A typical application is in the area of embedded systems.
If it is not feasible to construct a SoC for a particular application, an alternative is a system in package (SiP) comprising a number of chips in a single package. SoC is believed to be more cost effective since it increases the yield of the fabrication and because its packaging is simpler

Structure

A typical SoC consists of:

• One or more microcontroller, microprocessor or DSP core(s).
• Memory blocks including a selection of ROM, RAM, EEPROM and Flash.
• Timing sources including oscillators and phase-locrked loops.
• Peripherals including counter-timers, real-time timers and power-on reset generators.
• External interfaces including industry standards such as USB, FireWire, Ethernet, USART, SPI.
• Analog interfaces including ADCs and DACs.
• Voltage regulators and power management circuits.

These blocks are connected by either a proprietary or industry-standard bus such as the AMBA bus from ARM. DMA controllers route data directly between external interfaces and memory, by-passing the processor core and thereby increasing the data throughput of the SoC.

Microcontroller-based System-on-a-Chip

Design flow

A SoC consists of the hardware described above, and the software that controls the microcontroller, microprocessor or DSP cores, peripherals and interfaces. The design flow for an SoC aims to develop this hardware and software in parallel.
Most SoCs are developed from pre-qualified hardware blocks for the hardware elements described above, together with the software drivers that control their operation. Of particular importance are the protocol stacks that drive industry-standard interfaces like USB. The hardware blocks are put together using CAD tools; the software modules are integrated using a software development environment.
A key step in the design flow is emulation: the hardware is mapped onto an emulation platform based on a field programmable gate array (FPGA) that mimics the behavior of the SoC, and the software modules are loaded into the memory of the emulation platform. Once programmed, the emulation platform enables the hardware and software of the SoC to be tested and debugged at close to its full operational speed.
After emulation the hardware of the SoC follows the place and route phase of the design of an integrated circuit before it is fabricated.
Chips are verified for logical correctness before being sent to foundry. The process is called ASIC verification. Verilog and VHDL are typical hardware description languages used for verification. With growing complexity of chips, hardware verification languages like SystemVerilog, SystemC, e, and OpenVera are used. The bugs found in the verification stage are reported to the designer.

System-on-a-Chip Design Flow

Fabrication

SoCs can be fabricated by several technologies, including:

• Full custom
• Standard cell
• FPGA

SoC designs usually consume less power and have a lower cost and higher reliability than the multi-chip systems that they replace. And with fewer packages in the system, assembly costs are reduced as well.
However, like most VLSI designs, the total cost is higher for one large chip than for the same functionality distributed over several smaller chips, because of lower yields and higher NRE costs.